1. Technical Field
The disclosed embodiments relate to source drivers, and more particularly to a source driver and a display apparatus.
2. Description of Related Art
Referring to FIG. 3, a source driver 900 includes a first output buffer 12, a second output buffer 14, a first output switch 16, a second output switch 18, a charge-sharing switch 20, a first resistor R1, and a second resistor R2. The first output buffer 12 is used for enhancing a first pixel signal and outputting a first enhanced pixel signal, and the second output buffer 14 is used for enhancing a second pixel signal and outputting a second enhanced pixel signal. The first output switch 16 and the second output switch 18 are simultaneously controlled by a first control signal, and the charge-sharing switch 20 is controlled by a second control signal. The first resistor R1 and the second resistor R2 are electrostatic discharge (ESD) protection resistors, and the resistance of each of the ESD protection resistors is R.
When the first control signal is changed to a high level, the first output switch 16 and the second output switch 18 are turned on, the charge-sharing switch 20 is cut off by the second control signal, the system enters into an output timing mode T1. In the output timing mode T1, the first enhanced pixel signal and the second enhanced pixel signal drives a display panel respectively through the first resistor R1 and the second resistor R2.
Next, the first control signal is changed from the high level to a low level, the first output switch 16 and the second output switch 18 are cut off, the charge-sharing switch 20 is turned on by the second control signal, the system enters into a charge-sharing timing mode T2. The resistance of the first resistor R1 and the second resistor R2 affect the efficiency of charge sharing during the charge-sharing timing mode T2, when the resistance of the first resistor R1 and the second resistor R2 are larger, the time taken by the electric potential of a first output terminal 24 and a second output terminal 25 to reach the intermediate value is longer, so the efficiency of the charge sharing is lower. During the output timing mode T1, the resistance of the first resistor R1 and the second resistor R2 limit the driving ability of the source driver 900, when the resistance of the first resistor R1 and the second resistor R2 are larger, the time taken by the electric potential of the first output terminal 24 and the second output terminal 25 to reach the final value is longer.
However, assuming the resistance of the equivalent resistor of the output switch and the ESD protection resistor are reduced, the driving ability and the efficiency of the charge sharing of the source driver can be improved, but the ESD protection of the source driver becomes worse.
Therefore, there is room for improvement in the art.